Registers
Buses
The FDE Cycle
CPU Performance
Processor Architectures
100

This register holds the address of the next instruction.

What is the Program Counter (PC)?

100

This bus carries data between the CPU and memory.

What is the Data Bus?

100

What does FDE stand for?

What is Fetch-Decode-Execute?

100

This determines how fast the CPU processes instructions.

What is Clock Speed?

100

This architecture stores instructions and data in the same memory.

What is Von Neumann architecture?

200

This register temporarily holds data fetched from memory.

What is the Memory Data Register (MDR)?

200

This bus determines which memory location is accessed.

What is the Address Bus?

200

During Fetch, the CPU retrieves instructions from here.

What is memory (RAM)?

200

Multiple of these let the CPU process tasks in parallel.

What are Cores?

200

This architecture separates memory for instructions and data.

What is Harvard architecture?

300

This register stores the result of ALU calculations.

What is the Accumulator (ACC)?

300

This bus sends control signals across components.

What is the Control Bus?

300

This orchestrates the components of the CPU

What is the Control Unit?

300

This small, fast memory improves data access speed.

What is Cache?

300

Name a CPU that combines elements of both Von Neumann and Harvard architectures.

What is a contemporary processor?

400

This register temporarily stores the instruction currently being executed.

What is the Current Instruction Register (CIR)?

400

True or False: The address bus transfers data in both directions.

What is False?

400

The ALU operates during this FDE stage.

What is Execute?

400

Cache size improves performance because it reduces access to this.

What is RAM?

400

An advantage of Harvard architecture is this.

What is faster data access?

500

This register stores the memory location to be accessed.

What is the Memory Address Register (MAR)?

500

This type of signal coordinates the timing and operation of data transfers on the buses.

What are Control Signals?

500

The CIR is used in this way during Decode.

What is splitting the instruction into opcode and operand?

500

Clock speed increases are limited by this.

What is heat or hardware / transistor limits?

500

This key feature of modern CPU architecture allows multiple tasks to be processed simultaneously, improving performance and efficiency by handling several instructions at once.

What is parallel processing?

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