Enter Title

Pioneers of Programming

100

This person created the C programming language.

Who is Dennis Ritchie?

200

This person invented the model of a machine capable of 'solving any problem'. Today, we call such a machine a computer.

Who is Alan Turing?

300

This person invented the first compiler for a computer programming language.

Who is Grace Hopper?

400

This person published the first computer algorithm ever.

Who is Ada Lovelace?

500

This person was responsible for the creation of the code that powered the Apollo space program and landed the lunar module on the moon in 1969.

Who is Margaret Hamilton?

Chrismas

100

In "A Christmas Carol", this was the first ghost to appear to Scrooge.

What is The Ghost of Christmas Past?

200

This popular drink is only “available” around Christmas.

What is Egg Nog?

300

In the song, "The Twelve Days of Christmas" this is given on the 10th day.

What is ten lords-a-leaping?

400

The lyric “It's fun to ride in this as we jingle all the way” comes from this song.

What is a one horse open sleigh?

500

The gingerbread house came from this country.

What is Germany?

ARM

100

This register in ARM7 is used to point to the location of currently executing instruction in a program.

What is R15?

200

These processors would be best suited to a system requiring hard real-time responses, such as a hard drive controller?

What is Cortex-R?

300

In the ARM Nomenclature ARMxTDMI, D and M stand for …

What is Debug and Fast Multiplier units are present?

400

An instruction that is used to move data from an ARM Register to a Status Register (CPSR or SPSR).

What is MSR?

500

True / False - In the multilevel feedback queue algorithm, the CPU bound processes are usually found in the higher queues.

What is False?

Futurewei

100

This person is the current president of Futurewei Technologies, Inc.

Who is Jason ChuanLung Chao?

200

The year in which Futurewei Technologies, Inc. was found.

When is 2001?

300

This is the current number of non-vacant Futurewei Technologies, Inc. office

What is eight?

400

This person has helped Austin Futurewei Technologies, Inc. office continues to function during the COVID-19 pandemic! ***DOUBLE JEOPARDY***

Who is Ky Nguyen?

500

True / False – We have to wear our masks in the office even when we are alone in our private office space

What is True?

RISCV - RISCV

100

The year in which RISC-V began or introduced?

What is 2010?

200

True/False – Because the register file is both read and written on the same clock cycle, any RISC-V datapath using edge-triggered writes must have more than one copy of the register file.

What is False? Edge-triggered state elements make simultaneous reading and writing both possible and unambiguous.

300

Freebie 

What is Freebie?

400

• Consider three branch prediction schemes: predict not taken, predict taken, and dynamic prediction. Assume that they all have zero penalty when they predict correctly and two cycles when they are wrong. Assume that the average predict accuracy of the dynamic predictor is 90%. Which predictor is the best choice for the following branches?
• 1. A conditional branch that is taken with 5% frequency 
• 2. A conditional branch that is taken with 95% frequency
• 3. A conditional branch that is taken with 70% frequency

• 1. A conditional branch that is taken with 5% frequency – What is predict not taken?
• 2. A conditional branch that is taken with 95% frequency – What is predict taken?
• 3. A conditional branch that is taken with 70% frequency – What is dynamic prediction?

500

• A group of students were debating the efficiency of the five-stage pipeline when one student pointed out that not all instructions are active in every stage of the pipeline. After deciding to ignore the effects of hazards, they made the following four statements. Which ones are correct?
• 1. Allowing branches and ALU instructions to take fewer stages than the five required by the load instruction will increase pipeline performance under all circumstances.
• 2. Trying to allow some instructions to take fewer cycles does not help, since the throughput is determined by the clock cycle; the number of pipe stages per instruction affects latency, not throughput. 
• 3. You cannot make ALU instructions take fewer cycles because of the writeback of the result, but branches can take fewer cycles, so there is some opportunity for improvement.

2. Trying to allow some instructions to take fewer cycles does not help, since the throughput is determined by the clock cycle; the number of pipe stages per instruction affects latency, not throughput. - Correct

4. Instead of trying to make instructions take fewer cycles, we should explore making the pipeline longer, so that instructions take more cycles, but the cycles are shorter. This could improve performance. – Correct