8086 Architecture
Addressing modes
Stack
Arithmetic/Logical
miscellaneous
100
Which of the following registers cannot be split into high and low bytes?

a) AX
b) SI
c) CX
d) DX
b) SI

Only the general purpose registers AX, BX, CX and DX can be split into high and low bytes
100
Will the following instruction work?

MOV DS, 5468
No.

Cannot move immediate data to a segment register
100
Chose the correct answer:

a) The stack segment and code segment start at the same point of memory and grow upward
b) The stack segment and code segment start at opposite points of memory and grow toward each other
c) There will be no problem if the stack and code segments meet each other
Correct answer:
b)The stack segment and code segment start at opposite points of memory and grow toward each other
100
True or False

The ADC instruction works the same as ADD if the carry is zero.
True

ADC instruction adds the two operands and the carry to achieve the result.
100
Which instruction can be used to combine the following two tasks

DEC CX
JNZ Label
LOOP instruction
200
This part in the 8086 architecture is responsible for pipeline queue of next instructions.
Bus Interface Unit
200
Will this instruction work? If not, why?

MOV AX, [CX]
No.

Only BX, SI or DI registers can be used for the register indirect addressing.
200
Will this instruction work?

POP BL
No.

only 16-bit registers can be PUSHed or POPed.
200
What does the following instruction do?

XOR AH, AH
Clears the contents of AH.

Note: XORing with itself results into zero.
200
What will be the status of the Parity Flag if the result of an arithmetic operation is 1110 1010 1100 0010?
PF = 0 (odd number of 1's)

Note: PF only counts the number of 1's in the lower byte of the result!
300
What is the size of Data Segment in 8086?
64 K bytes
300
What is the logical address of location the following instruction is trying to access?

MOV AL, [BP][DI]+5
The logical address is SS:BP+DI+5.

The address is determined by Stack Segment because BP register is used in the above instruction.
300
True or False

After each PUSH operation, the SP is automatically decremented by 1
False

After each PUSH instruction, SP is decremented by 2
300
Where will the result be stored for the following set of instructions?

MOV AX, 2378
MOV BX, 0500
MUL [BX]
Lower word in AX and higher word in DX

Note: The above instruction performs the multiplication as AX x [BX].
300
Which instruction is used after a BCD subtraction operation to ensure the correct result?
DAS
Decimal Adjust for Subtraction
400
What is the size of Address Bus in 8086?
20 bit
400
Which of the following two is faster to execute? And why?

a) MOV AX, BX
b) PUSH AX
Ans=a)

a) uses internal register, so it is faster than b) which uses stack. Stack is always in the external RAM, so it is slower to access than the internal registers
400
For FAR CALL, which registers are automatically stored onto the stack?
CS and IP
400
What will be the status of CF and OF after the following instruction?

AND AL, 0F
CF = OF = 0

Note: During the AND instruction, the CF and OF are automatically set to zero and the PF, ZF and SF are set according to the result
400
If you want to pass parameters to a subroutine called via CALL instruction, which of the following way can be used?

a) Passing parameters by saving in data memory
b) Passing parameters via the working registers
c) Pushing passing variables onto stack
d) All of the above
e) None of the above
d) All of the above!
M
e
n
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