Simulation - Synthesis
Edge, Vertex
Basic requirement of Graph Theory
Physical verification tools in design process includes design rule checking, circuit extractors, ratio rule and other static checks.
Physical verification tools in design process include
Behavioral tools contain simulation at various levels. It will be required to check out the design before turning out the design in silicon.
Behavioral tools contain
Distributing Cell
Routing congestion can be avoided by
H tree
Which method/s of physical clocking is/are a /the recursive structure where the memory elements are grouped together to make the use of nearby or same distribution points?
Synthesis
Which among the following is a process of transforming design entry information of the circuit into a set of logic equations?
Selection and placement geometric shapes are done using some form of cursor and it may also allow selection of menu items.
Selection and placement is done using
Gate-level
Which type of simulation mode is used to check the timing performance of a design?
Clock buff/inverters are having equal rise and fall times with high drive strengths compare to normal buff/inverters
Difference between Clock buff/inverters and normal buff/inverters is __
charge injection & charge feedthrough
In MOS switch, clock feedthrough effect is also known as _
Netlist
In logic synthesis, ________ is an EDIF that gives the description of logic cells & their interconnections.
Waveform Editor
The utilization of CAD tools for drawing timing waveform diagram and transforming it into a network of logic gates is known as ________.
Placement of logic functions in optimized circuit in target chip & Interconnection of components in the chip
Which among the following operation/s is/are executed in physical design or layout synthesis stage?
Double back with flipped rows
Which configuration is more preferred during floorplaning ?
CLKBUF
Which of the following is best suited for CTS?
Circuit description language where the primitives are circuit elements such as transistors, wires and nodes. It captures the design intent and not directly the physical layout.
Which verification capture’s design intent and not physical layout?
Logic cell
_________ is the fundamental architecture block or element of a target PLD.
Yes
Floorplanning and routing can be proceed in Parallel
There can be both violations.
After the final routing the violations in the design
Metal 4 & 5
If metal6 and metal7 are used for the power in 7 metal layer process design then which metals you will use for clock ?
The nature of physical layout verification design rule checking software depends on whether the design rules are absolute or lambda-based or on whether or not the layout is on a fixed or virtual grid.
The nature of physical layout verification software depends on
Extraction
In VLSI design, which process deals with the determination of resistance & capacitance of interconnections?
IO Nets
Prerouting means routing of _____.
Ratio of required routing tracks to available routing tracks
What is routing congestion in the design?
Power Routing
What are preroutes in your design?