Hardware & Software
Operational Concepts
Register Architecture
Memory & Addressing
Data Transfer
100

Which is system software?

OS

100

What does "bus" mean here?

Data pathway

100

Which is a general-purpose register?

AX

100

What is memory segmentation?

Dividing memory into blocks

100

MOV is an example of a:

Data transfer instruction

200

CPU stands for:

Central Processing Unit 

200

Fetch-decode-execute is a:

CPU cycle

200

IP register points to:

Next instruction

200

A stack follows what order?

LIFO

200

ADD/SUB are what type?

Arithmetic instructions

300

Which is hardware?

RAM

300

An interrupt causes the CPU to:

Pause and handle a request

300

SP register is used for:

Stack operations

300

PUSH adds data to the:

Top of the stack

300

AND, OR, XOR are:

Logic instructions

400

Von Neumann architecture stores what together?

Data and instructions

400

Synchronous bus uses:

A shared clock signal

400

FLAGS register shows:

Operation results (e.g. zero, carry)

400

Which addressing mode uses a register's value directly?

Register addressing mode

400

NOT operation does what?

Inverts each bit

500

Which unit executes instructions?

ALU (Arithmetic Logic Unit)

500

What triggers a hardware interrupt?

An external device (e.g. keyboard, disk)

500

Which register holds return addresses in a call?

Stack (via SP)

500

Base + offset addressing is used for:

Accessing segmented memory

500

CMP instruction is mainly used for:

Comparing values before a jump

M
e
n
u