CPU Components
Instruction Cycle
Instruction Sets & Architecture
Problem Solving and Algorithms
Programming Paradigms and Languages
100

This circuit generates regular pulses to synchronize the operations of CPU components.

What is the CPU Clock?

100

This is another name for the fetch-decode-execute cycle.

What is instruction cycle?

Machine cycle also accepted

100

This part of an instruction specifies the operation to be performed.

What is the opcode?

100

An algorithm must have this number of steps to be considered valid.

What is a finite number of steps?

100

This programming paradigm is based on classes and objects.

What is OOP?

200

This type of high-speed memory stores frequently accessed data near the CPU.

What is Cache memory?
200

This register stores the actual data being read from or written to memory.

What is the MDR? Memory Data Register

200

This term refers to the complete list of machine-level commands a processor understands.

What is instruction set?

200

This representation of an algorithm uses English-like statements without strict syntax rules.

What is pseudocode?

200

This stage of the translation process checks whether the program follows grammatical rules of the language. 

What is syntax analysis?

300

This is a system of electrical pathways that transfers data, addresses, and control signals between components of the CPU.

What is a bus?

300

This is the last stage of the instruction cycle.

What is store?

300

This instruction type controls program flow.

What are branching instructions?

300

Debugging and feature updates occur during this stage of the problem-solving process.

What is Implementation and Review?

300

The programming paradigm that focuses on describing what should be done rather than how to do it is this.

What is declarative programming?

400

This cache level is located closest to the processor and is usually on the same chip.

What is a L1 Cache?

400

If the ALU performs a calculation and sends a condition signal back to the CPU, this stage is occurring.

What is Execute?

400

This architecture typically requires multiple clock cycles per instruction and has a large instruction set.

What is CISC?

400

Breaking a complex problem into smaller, manageable parts occurs during this stage.

What is Problem Analysis?

400

This translation stage breaks code into tokens.

What is lexical analysis?

500

In a multicore processor, there are multiple sets of these components within one CPU.

What are Control Units, ALUs, registers, and cache?

500

During fetch, the address in this register is copied to the MAR.

What is Program Counter?

500

In this instruction format, the result of the operation is stored in the accumulator.

What is one address instruction format?

500

This design methodology involves refining a solution gradually.

What is stepwise refinement?

500

MATLAB and R are commonly used for this field.

What is scientific or formula based applications/problems?

M
e
n
u