PC-Program counter
address of next instruction in memory
A bus
a high-speed internal connection. Buses send signals between the processor and other components.
Fetch
to get the next instruction from the memory
MAR-Memory address register
address of the instruction during the fetch phase or the address to retrieve data from during the execute phase
Address bus
carries memory addresses from the processor to other components such as RAM
Decode
process/translate the instruction to work out what it is
MDR-Memory data register
current data that has been fetched from memory or is about to be stored in memory
Data bus
carries the actual data between the processor and other components
Execute
to do/perform the instruction fetch-execute cycle
CU/CIR-Control Unit/Current Instruction register
instruction to be executed
Control bus
carries control signals from the processor to other components. The control bus also carries the clock's pulses.
Who?
Von Neumann
ACC-Accumulator
result of the current calculation
What did he find
found that you can store multiple things in only one set of memory