Fundamentals
If V1=0 Volts V2= -5Volts , in Positive logic system the voltage value of logic 1 is
0 Volts
Tabular method of simplification is also called
Quine MacKlusky ( QM ) Method
Multiplexer is also called
Universal logic ckt
The even parity bit generated for the input :10011 is
1
Synchronous counter is faster in operation compared to ripple counter ( T/F)
False
Demorgans first law states that
complement of product is equal to sum of complements
It is group of 8 adjacent ones in the K Map
Octate
Decoder is same as demux except the
data input
In SR FF this state is forbidden
S=R=1
Mod 7 counter has these many states
7 states
Basic gates are
AND, OR and NOT gates
Magnitude comparator is combinational ckt(True/False)
True
The even parity bit generated for the input :10011 is
1
When T input is 1 output of T FF
Toggles
The number of FF required to count from 0 to 8 is
4
This gate is also called equivalence gate
Exnor gate
First step in QM method is determination of prime implicants and second step is to find
essential prime implicants
To realize 16X 1 Mux the number of 2X1 Mux required is
15
By shorting both J and K equal to 1 we get this flipflop
Toggle FF
Frequency divider is an application of
counter
Dual of Relation A= A + 0 is
A= A.1
Quad in K Map eliminates
2 variables
16 X 1 Multiplexer has these many control lines
4
Flip flops having single input other than clock are
Toggle FF and Data FF
clock is nothing but
square waveform