ASIC
The utilization of CAD tools for drawing timing waveform diagram and transforming it into a network of logic gates is known as ________
Waveform Editor
Hold time is defined as the time required for the data to ________ after the triggering edge of clock.
Remain Stable
Which type of MOSFET exhibits no current at zero gate voltage?
Enhancement MOSFET
A process of transforming design entry information of the circuit into a set of logic equations_________
Synthesis
The time required for an input data to settle _____ the triggering edge of clock is known as ‘Setup Time’.
Before
In MOS switch, clock feedthrough effect is also known as __________ and ________.
charge injection and charge feedthrough
In VLSI design, which process deals with the determination of resistance & capacitance of interconnections?
Extraction
The output of sequential circuit is regarded as a function of time sequence of __________ and _______.
Inputs and Internal States
In DIBL, which among the following is/are regarded as the source/s of leakage?
a. Subthreshold conduction
b. Gate leakage
c. Junction leakage
d. All of the above
All of the above