dma
Which of the following provides an efficient method for transferring data from a peripheral to memory?
a)dma controller
b) serial port
c) parallel port
d) dual port
dma controller
Any electronic holding place where data can be stored and retrieved later whenever required is ____________
a) memory
b) drive
c) disk
d) circuit
memory
Memory is the place where data can be stored and later retrieved. Memory can be of classified into register, cache, main memory, etc.
what do you mean by interconnection structures?
The components that form a multiprocessors system are CPUs, IOPs connected to input-output devices, and a memory unit.
what do you mean by system bus
Bus that connects CPUs, IOPs, and Memory in multiprocessor system(bus controller/arbitrator)
Devices that provide backup storage are called ____________.
(A) cache memory
(B) virtual memory
(C) auxiliary memory
(D) main memory
auxiliary memory
Which of the following can be adopted for the systems which does not contain DMA controller for data transmission?
a) counter
b) timer
c) polling
d) memory
polling
The polling and interrupt helps for data transmission for the systems which do not have DMA controller.
Which of the following is the fastest means of memory access for CPU?
a) Registers
b) Cache
c) Main memory
d) Virtual Memory
registers
Registers are the fastest means of access for CPU. Registers are the small memory locations which are present closest to the CPU.
give example for physical form available for establishing interconnection network
Time - shared common bus
● Multiport memory
● Crossbar Switch
● Multistage Switching network
● Hypercube system
what do you mean by Synchronous bus
achieved by driving both units from a common clock source
Which memory stores the binary information in the form of electric charges that are applied to capacitors?
(A) Static RAM
(B) Dynamic RAM
(C) PROM
(D) EEPROM
dynamic RAM
Which of the following have low-level buffer filling?
a) output
b) peripheral
c) dma controller
d) input
dma controller
The DMA controller can initiate and control the bus access between I/O devices and memory, and also between two different memory areas. Therefore, the DMA controller can act as a hardware implementation of low-level buffer filling or emptying the interrupt.
The memory implemented using the semiconductor chips is _________
a) Cache
b) Main
c) Secondary
d) Registers
main
The main memory is implemented using semiconductor chips. Main memory is located on the motherboard. It mainly consists of RAM and small amount of ROM.
what do you mean by time shared common bus
A common bus multiprocessor system consists of a number of processors connected through a common path to a memory unit.
what do you mean by Asynchronous bus
accompanied by handshaking control signals
__________ consists essentially of internal flip-flops that store the binary information.
(A) Static RAM
(B) Dynamic RAM
(C) PROM
(D) EEPROM
static RAM
Which of the following is used to transfer the data from the DMA controller to the destination?
a) data bus
b) address bus
c) request bus
d) interrupt signal
data bus
The data bus is used for the transmission of data from the DMA controller to the destinal. The DMA controller can directly select the peripheral in some cases in which the data transfer is made from the peripheral to the memory.
Size of the ________ memory mainly depends on the size of the address bus.
a) Main
b) Virtual
c) Secondary
d) Cache
main
The size of the main memory depends on the size of the address bus of the CPU. The main memory mainly consists of RAM and ROM, where RAM contains the current data and programs and ROM contains permanent programs like BIOS.
what do you mean by multiport memory
A memory which provides more than one access port to each processor or to separate parts of a single processor is called multiport memory
name the dynamic arbitration algorithms
time slice
polling
LRU
FIFO
rotating daisy-chain
__________ is a program whose function is to start the computer software operating when power is turned on.
(A) Operating loader
(B) Memory loader
(C) Static loader
(D) Bootstrap loader
Bootstrap Loader
Which of the following is used to request the bus from the main CPU?
a) data bus
b) address bus
c) bus requester
d) interrupt signal
bus requester
The bus requester requests the bus from the main CPU. In earlier design, the processor bus does not support the multi master system and there were no bus request signals. In such cases, the processor clock was extended.
Which of the following is independent of the address bus?
a) Secondary memory
b) Main memory
c) Onboard memory
d) Cache memory
secondary memory
The secondary memory is independent of the address bus. It increases the storage space. It is implemented in the form of magnetic storage devices.
what do you mean by crossbar switch
Crossbar switch is an assembly of individual switches between a set of inputs and a set of outputs. The switches are arranged in a matrix. A given crossbar switch is a single layer, nonblocking switch. It means that other concurrent connections do not prevent connecting other inputs to other outputs. Crossbar switches can establish multiple parallel data paths. Therefore it is used for high performance interconnection and network.
what do you mean by memory bus
buses that transfer data between the CPUs and memory. These are called memory buses
Which of the following is not auxiliary memory?
(A) Optical disks
(B) Magnetic bubble memory
(C) Magnetic drums
(D) All are auxiliary memories
all are auxiliary memory