NAND and NOR
Which are the universal gates?
Multiplexer
which is the combinational circuit that has multiple inputs and single output
decoder
GM INSTITUTE OF TECHNOLOGY, DAVANGERE
LESSON PLANNING DOCUMENT
DEPARTMENT OF ELECTRONICS AND COMMUNICATION
QMP – – 7.5 R/A – 2 Rev. 1
NAME OF THE STAFF MEMBER: ASHA T
BRANCH
ELECTRONICS AND COMMUNICATION
SEMESTER
III 'B'
SUBJECT
DIGITAL ELECTRONICS
UNIVERSITY CODE
15EC33
TOTAL CONTACT HOURS
52
TOTAL CONTACT HOURS PER WEEK
THEORY
04 / WEEK
PRACTICALS/ FIELD VISITS
OPTIONAL
ADDITIONAL INTERACTION HOURS
02 PREFERABLE
DATE OF COMMENCEMENT OF CLASSES
/08/2017
DATE OF FIRST TEST/SESSIONALS
20/09/2017
DATE OF SECOND TEST/SESSIONALS
/10/2017
DATE OF MAKE UP TEST/SESSIONALS
IF ANY
/11/2017
LAST WORKING DAY
26/11/2016
GM INSTITUTE OF TECHNOLOGY, DAVANGERE
DETAILED LESSON PLANNING DOCUMENT
SL NO.
DESCRIPTION OF THE PORTION TO BE COVERED HOUR WISE
PLANNED
DATE
ACTUAL
DATE
REMARKS
DD
MM
YY
DD
MM
YY
LECTURER
HOD
1
Module1:Principlesof combination logic:Definition of combinational
logic
8
17
17
2
canonical forms
8
17
17
3
Generation of switching equations from truth tables
8
17
17
4
Karnaugh maps-3 variables
8
17
17
5
Karnaugh maps-4 variables
8
17
17
6
Karnaugh maps-5 variables
8
17
17
7
Incompletely specified functions( Don’t care terms)
8
17
17
8
Simplifying Max term equations
8
17
17
9
Quine-McCluskey techniques-3 & 4 variables
8
17
17
10
Quine-McCluskey techniques-3 & 4 variables
8
17
17
11
Module -2 Analysis and design of combinational logic: Decoders
8
17
17
12
Decoders
8
17
17
13
Encoders
9
14
digital multiplexers
9
17
17
15
Adders and subtractors
9
17
17
16
Look ahead carry
9
17
17
17
Binary comparators
9
17
17
18
Programmable logic devices
9
17
17
19
Complex PLD
9
17
17
20
FPGA
9
17
17
21
Module -3
Flip-Flops: Basic Bistable elements
9
17
17
22
Latches
9
17
17
23
The master-slave flip-flops:SR flip flops
9
17
17
24
JK flip-flops
9
17
17
25
Characteristic equations
9
17
17
26
Registers
9
17
17
27
binary ripple counters
10
17
17
28
binary ripple counters
10
17
17
29
synchronous binary counters
10
17
17
30
synchronous binary counters
31
Module-4:Sequential circuit design:Design of a synchronous counters
10
17
17
32
Design of a
synchronous mod-n counter using clocked JK flip flop
10
17
17
33
Design of a
synchronous mod-n counter using clocked D flip flop
10
17
17
34
Design of a
synchronous mod-n counter using clocked T flip flop
10
17
17
35
Design of a
synchronous mod-n counter using clocked SR flip flop
10
17
17
36
Mealy and Moore models
10
17
17
37
State machine notation
10
17
17
38
State machine notation
10
17
&n
Flips and latches
Which are fundamental elements in sequential circuits?
JK flip flop
Toggle state occur in which flip flop?
AND,OR and NOT gate
which are the basic gates ?
Hexadecimal,Octal,decimal,binary system
Which are the different types of number system ?
XOR gate
in which gate for odd number of inputs the output is high?
Counters and Registers
What are the application of sequential circuits?
Mealy and Moore models
which are the different types of models available in sequentail circuits