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When and at what time is the Exam 2?
18th November 2021 at 7pm
What is Multi-cycle instruction execution?
Each stage takes one clock cycle
Multiple cycles are needed to execute each instruction
What are the different type of MIPS instructions, give two examples of each
R-type, I-type, J-type
add, or, addi, ori, jump, beq
What is a Hazard? What are the different types of hazard?
Situations that prevent starting the next instruction in the next cycle
Structure hazards :A required resource is busy
Data hazard :Need to wait for previous instruction to complete its data read/write
Control hazard :Deciding on control action depends on previous instruction
What is the difference between a wire and register?
The value of wire is dynamic while the value in a register is static.
Given a 2 to 1 Mux how can you construct a 4 to 1 Mux.
Use 3, 2 to 1 Muxes
What are the Shortcoming of Single-cycle?
Faster instructions are held back by slower ones
Long clock cycle time
Duplicate hardware: Two adders
What are the five steps of instruction execution?
1.IF: Instruction fetch from memory
2.ID: Instruction decode & register read
3.EX: Execute operation or calculate address
4.MEM: Access memory operand
5.WB: Write result back to register
lw $t1, 60($s2)
sub $t2, $t0, $t1
What hazard is seen here, why?
Data Hazard.
During pipeline execution, the instruction sub fetches the value of $t2 before it has been updated by lw
Name any three primitive SV operations
And
Or
Buf
Xor
What is the Full Form of FSM
Finite State Machine
Name any 4 outputs of the control Unit
RegWrite
RegDist
ALUSrc
Branch
MemWrite
MemtoReg
ALUOP
What is the opcode for R-type instructions?
00000
Name and explain any three methods of preventing hazards
Rearranging: reordering the instruction execution to resolve hazard
Forwarding: Pass on the result from mid execution to the next instruction
Stalling: Waiting
Branch Prediction: Guess the next fetch address
_____ term is used to describe the parameters that go in the parenthesis when modules are created
PortList
NetList
What are exceptions?
What does the processor do once an exception has occurred?
Unscheduled function call to exception handler.
Records cause of exception (Cause register)
Jumps to exception handler (0x80000180)
Returns to program (EPC register)
What type of parallelism does Pipelining apply.
Temporal parallelism: Breaking up tasks into stages and letting them overlap
What are the different steps required for R-type instructions?
IF: Read an instruction from memory.
ID: Read source registers and generate control signals.
EX: Compute an R-type result or a branch outcome.
WB: Store a result in the destination register.
Instructions affected by hazard
40% of loads used by next instruction
25% of branches mispredicted
Assume 1 cycle with no stall, 2 with stall
What is the CPI of lw and jump
CPI lw = 1(0.6) + 2(0.4) = 1.4
CPI beq = 1(0.75) + 2(0.25) = 1.25
How does the monitor function work?
The monitor function executes a print when the value of the supplied parameter changes.